1. Field of the Invention
The present invention relates generally to a semiconductor package, and more particularly to a semiconductor package stack using through-via connection.
2. Description of the Prior Art
The technology for packaging semiconductor integrated circuits has continuously advanced in pursuit of more compact design while providing better mounting reliability such that, for example, the size of certain type of semiconductor packages is reduced to the size comparable to that of a typical semiconductor chip. Increasing the efficiency of the required processes for mounting the semiconductor packages and ensuring the continued mechanical/electrical reliability after the mounting are also important.
The term “stacking” generally refers to vertically piling up at least two semiconductor chips or packages one over the other. For example, two 256 M DRAMs can be stacked to form a single 512 M DRAM. Stacked packages provide high mounting density in the form of increased overall memory capacity per unit of mounting area.
FIG. 1 is a cross-sectional view of stacked conventional FBGA (fine pitch ball grid array) type packages. In FIG. 1, two FBGA-type packages 10, 20 are stacked utilizing two printed circuit boards (PCBs) 22, 24. The two packages 10, 20 are electrically connected to each other by a connection wall 26 interposed between the PCBs 22, 24 at the periphery of the lower package 10.
Each package 10 (or 20, hereinafter shown in parenthesis respectively) includes a substrate 2 (or 12); a semiconductor chip 1 (or 11) attached to the substrate 2 (or 12); a set of electrode terminals 3 (or 13) positioned on the respective substrate 2 (or 12) electrically connected to a set of bonding pads la (or 11a) of the respective semiconductor chip 1 (or 11) by, for example, a set of bonding wires 4 (or 14); a sealant 5 (or 15) for sealing the upper surface of the substrate 2 (or 12) over the semiconductor chips 1 (or 11) including the bonding wires 4 (or 14); and a set of solder balls 6 (or 16) attached to the lower surface of the respective substrate 2 (or 12).
The packages 10, 20 are mechanically attached respectively to the corresponding PCBs 20, 22 by the solder balls 6, 16 respectively while being electrically connected to respective circuit patterns 23, 25 of the PCBs 20, 22.
The lower PCB 22 has additional solder balls 28 attached to its lower surface, so that the lower PCB 22 can be mounted on an external circuit, particularly on a motherboard.
However, in this conventional arrangement, at least two PCBs 22, 24 and a connection wall 26 are necessary for electrical connection between stacked packages such that the manufacturing cost and the defective ratio are increased.
In addition, the basic structure of the conventional package stack, i.e. stacking two packages on each other, limits its compactness.
Furthermore, the connection wall such as 26 for connecting the PCBs 22, 24 requires space and makes it difficult to reduce the overall size and, as a result, the mounting area.